1. Field of the Invention
The invention pertains to an integrated circuit with capacitors for smoothing the supply voltage.
Integrated circuits are known in a multiplicity of embodiments and require no further explanation. Smoothing the supply voltage of integrated circuits by means of capacitors proves to be advantageous because it enables the integrated circuits to operate free from interference, and it means that they have reduced electromagnetic emission. Integrating the capacitors provided for smoothing into the integrated circuit makes particularly effective smoothing possible. On the other hand, capacitors provided in integrated circuits require a relatively large area on the chip containing the integrated circuit, and integrated circuits containing capacitors are therefore relatively large and hence also expensive, susceptible to faults and cumbersome.
2. Summary of the Invention
It is accordingly an object of the invention to provide an integrated circuit, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which can be accommodated on an area that is as small as possible.
With the foregoing and other objects in view there is provided, in accordance with the invention, an integrated circuit, comprising:
supply interconnects disposed on a substrate body for supplying the integrated circuit with a supply voltage; and PA0 a plurality of capacitors for smoothing the supply voltage carried on the supply interconnects, the capacitors being disposed below the supply interconnects.
In other words, the invention is characterized by the positioning of the capacitors below the supply interconnects which are used to supply the integrated circuit with the supply voltage.
As the regions below the supply interconnects in conventional integrated circuits have not been used at all to date, integrating the capacitors makes the integrated circuit no larger, or at the outside minimally larger, than it would be without the capacitor integration.
The integrated circuit according to the invention can therefore be accommodated on a minimal area.
The proximity of the capacitors to the supply interconnects carrying the supply voltage which is to be smoothed makes it possible, furthermore, for the electrical connections, which are necessary in order to arrange the capacitors such that they act between the two terminals of the supply voltage, to be extremely short. This, of course, means that the integrated circuit is simple in construction, easy to manufacture, and reliable in operation.
In accordance with an added feature of the invention, the supply interconnects comprise a VDD supply interconnect for a VDD potential, and a VSS supply interconnect for a VSS potential, whereby the supply interconnects form a constituent part of a metal layer of the integrated circuit.
In accordance with an additional feature of the invention, the plurality of capacitors are one or more capacitors below each the VDD supply interconnect and the VSS supply interconnect.
In accordance with another feature of the invention, the capacitors are either disposed essentially below the VDD supply interconnect or essentially below the VSS supply interconnect.
In accordance with a further feature of the invention, a polysilicon layer is disposed on the substrate body. The capacitors below the VDD supply interconnect are formed by interacting poly sections in the polysilicon layer and p.sup.+ -regions below the poly sections in the substrate body. The capacitors below the VSS supply interconnect are formed by interacting poly sections in the polysilicon layer and n.sup.+ -regions below the poly sections in the substrate body. The poly sections of the capacitors below the VDD supply interconnect are electrically connected to the VSS supply interconnect, and the p.sup.+ -regions are multiply connected to the VDD supply interconnect. The poly sections of the capacitors below the VSS supply interconnect are electrically connected to the VDD supply interconnect, and the n.sup.+ -regions are multiply connected to the VSS supply interconnect.
In accordance with again a further feature of the invention, the poly sections are strips with finger-like projections. The projections of the poly sections of the capacitors below the VDD supply interconnect extend to below the VSS supply interconnect, and the finger-like projections of the poly sections of the capacitors below the VSS supply interconnect extending to below the VDD supply interconnect.
In accordance with a concomitant feature of the invention, the intermediate spaces formed between mutually adjacent poly sections are used for connecting the p.sup.+ -regions to the VDD supply interconnect and for connecting the n.sup.+ -regions to the VSS supply interconnect.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in an integrated circuit, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.